Microprocessor Optimization for Network Protocol Implementations

A popular trend in modern computing is the migration from desktop computing to a more distributed environment where individual devices communicate with each other over a network. Such devices, especially those in the wireless domain, are typically limited in resources, most importantly size and power. It is therefore important to be able to implement network protocols efficiently, resulting in high performance with low cost and low power consumption. For our CS252 course project, we have investigated ways to optimize a modern microprocessor architecture for the implementation of the Intercom wireless communication protocol. The Xtensa processor generation tools were used to configure a sample processor and then tune the architecture optimally for the protocol application. In this study, we have looked only at the transport layer of the protocol, but the results should be valuable to protocol implementations in general. In this paper, we present both the methodology of our analysis and the performance results for our proposed improvements.